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SEMICONDUCTOR MEMORIES FOR LOW-POWER AND LOW-COMPUTE HARDWARE-ORIENTED ARTIFICIAL INTELLIGENCE SYSTEMopen access

Authors
Kim, SoominLee, YejiSon, So WonKim, SungjunKim, Soo YounKang, MyounggonCho, Seongjae
Issue Date
2025
Publisher
IEEE
Keywords
Artificial Intelligence (AI); Computational Concurrency; Energy Saving; Estimation; Global Energy and Environment; Hardware-oriented AI; Si Processing; Tracking
Citation
Proceedings of the 2025 International Conference on Machine Learning and Cybernetics, pp 402 - 406
Pages
5
Indexed
SCOPUS
Journal Title
Proceedings of the 2025 International Conference on Machine Learning and Cybernetics
Start Page
402
End Page
406
URI
https://scholarworks.dongguk.edu/handle/sw.dongguk/64000
DOI
10.1109/ICMLC66258.2025.11280104
ISSN
2160-133X
2160-1348
Abstract
The development of artificial intelligence (AI) technologies for reasoning based on big data is rapidly advancing day by day. Moving beyond large language models (LLMs), recent technological trends show the emergence of large vision models (LVMs), indicating that the application scope of AI is expanding at an accelerated pace. Currently, most AI services are implemented through software technologies. However, from the perspective of energy saving and environmental pollution, it is a crucial turning point where a shift to hardware-oriented AI technology must take place. Hardware-oriented AI aims to move away from the conventional series high-speed operation, towards low-power computing technologies that maximize computational concurrency. In order to achieve this goal, changes in computing architecture are necessary, with semiconductor memory technology playing a central role. Simultaneously, recent research indicates that high-speed, large-scale computation systems naturally lead to increased system temperatures, which can produce gases harmful to human health. Although these goals differ in terms of the original starting points, all these technological objectives share a common aim of low-power and small-number computing. This paper examines next-generation AI computing technologies based on large-capacity memory technologies, specifically dynamic random-access memory (DRAM) and flash memories built on relatively mature Si fabrication processing suitable for chip production, evaluating pattern recognition accuracies. © 2025 IEEE.
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