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SEMICONDUCTOR MEMORIES FOR LOW-POWER AND LOW-COMPUTE HARDWARE-ORIENTED ARTIFICIAL INTELLIGENCE SYSTEM

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dc.contributor.authorKim, Soomin-
dc.contributor.authorLee, Yeji-
dc.contributor.authorSon, So Won-
dc.contributor.authorKim, Sungjun-
dc.contributor.authorKim, Soo Youn-
dc.contributor.authorKang, Myounggon-
dc.contributor.authorCho, Seongjae-
dc.date.accessioned2026-03-17T07:00:20Z-
dc.date.available2026-03-17T07:00:20Z-
dc.date.issued2025-
dc.identifier.issn2160-133X-
dc.identifier.issn2160-1348-
dc.identifier.urihttps://scholarworks.dongguk.edu/handle/sw.dongguk/64000-
dc.description.abstractThe development of artificial intelligence (AI) technologies for reasoning based on big data is rapidly advancing day by day. Moving beyond large language models (LLMs), recent technological trends show the emergence of large vision models (LVMs), indicating that the application scope of AI is expanding at an accelerated pace. Currently, most AI services are implemented through software technologies. However, from the perspective of energy saving and environmental pollution, it is a crucial turning point where a shift to hardware-oriented AI technology must take place. Hardware-oriented AI aims to move away from the conventional series high-speed operation, towards low-power computing technologies that maximize computational concurrency. In order to achieve this goal, changes in computing architecture are necessary, with semiconductor memory technology playing a central role. Simultaneously, recent research indicates that high-speed, large-scale computation systems naturally lead to increased system temperatures, which can produce gases harmful to human health. Although these goals differ in terms of the original starting points, all these technological objectives share a common aim of low-power and small-number computing. This paper examines next-generation AI computing technologies based on large-capacity memory technologies, specifically dynamic random-access memory (DRAM) and flash memories built on relatively mature Si fabrication processing suitable for chip production, evaluating pattern recognition accuracies. © 2025 IEEE.-
dc.format.extent5-
dc.language영어-
dc.language.isoENG-
dc.publisherIEEE-
dc.titleSEMICONDUCTOR MEMORIES FOR LOW-POWER AND LOW-COMPUTE HARDWARE-ORIENTED ARTIFICIAL INTELLIGENCE SYSTEM-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/ICMLC66258.2025.11280104-
dc.identifier.scopusid2-s2.0-105031713199-
dc.identifier.bibliographicCitationProceedings of the 2025 International Conference on Machine Learning and Cybernetics, pp 402 - 406-
dc.citation.titleProceedings of the 2025 International Conference on Machine Learning and Cybernetics-
dc.citation.startPage402-
dc.citation.endPage406-
dc.type.docTypeConference paper-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscopus-
dc.subject.keywordAuthorArtificial Intelligence (AI)-
dc.subject.keywordAuthorComputational Concurrency-
dc.subject.keywordAuthorEnergy Saving-
dc.subject.keywordAuthorEstimation-
dc.subject.keywordAuthorGlobal Energy and Environment-
dc.subject.keywordAuthorHardware-oriented AI-
dc.subject.keywordAuthorSi Processing-
dc.subject.keywordAuthorTracking-
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