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Design of a 9-bit 1GS/s CMOS Folding A/D Converter with a Boundary Error Reduction Technique

Authors
송민규
Issue Date
3-Sep-2014
URI
https://scholarworks.dongguk.edu/handle/sw.dongguk/50100
Place
미국
미국 라스베가스
Conference Date
2014-09-01 ~ 2014-09-04
Conference Name
IEEE International SOC Conference(SOCC 2014)
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College of Advanced Convergence Engineering > Division of System Semiconductor > 2. Conference Papers

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College of Advanced Convergence Engineering (Division of System Semiconductor)
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