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Design of a 9-bit 1GS/s CMOS Folding A/D Converter with a Boundary Error Reduction Technique
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 송민규 | - |
| dc.date.accessioned | 2024-10-30T15:23:15Z | - |
| dc.date.available | 2024-10-30T15:23:15Z | - |
| dc.date.issued | 2014-09-03 | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/50100 | - |
| dc.title | Design of a 9-bit 1GS/s CMOS Folding A/D Converter with a Boundary Error Reduction Technique | - |
| dc.type | Conference | - |
| dc.citation.startPage | 83 | - |
| dc.citation.endPage | 87 | - |
| dc.citation.conferenceName | IEEE International SOC Conference(SOCC 2014) | - |
| dc.citation.conferencePlace | 미국 | - |
| dc.citation.conferencePlace | 미국 라스베가스 | - |
| dc.citation.conferenceDate | 2014-09-01 ~ 2014-09-04 | - |
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