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저전력, 고속 동작용 Successive Approximation Register (SAR) 로직 회로Low-power and high-speed Successive Approximation Register circuit
- Alternative Title
- Low-power and high-speed Successive Approximation Register circuit
- Abstract
- 본 발명은 제안하는 Successive Approximation Register (SAR) 로직을 이용함으로써 Sample and Hold Amplifier와 Residue Amplifier에 사용되는 Amplifier의 설계사양을 낮추어 저전력 고속 동작이 가능한 Analog-to-Digital Converter (ADC)를 설계하는 기술에 관련된 발명이다.
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Related Researcher
- Kim, Soo Youn
- College of Advanced Convergence Engineering (Division of System Semiconductor)