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A High Performance 32X32-bit Multiplier Using Pass-Gate Combined CMOS Logic
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 송민규 | - |
| dc.date.accessioned | 2024-10-30T02:41:50Z | - |
| dc.date.available | 2024-10-30T02:41:50Z | - |
| dc.date.issued | 2000-02-24 | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/37484 | - |
| dc.title | A High Performance 32X32-bit Multiplier Using Pass-Gate Combined CMOS Logic | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | IDEC Conference 2000 | - |
| dc.citation.conferencePlace | 대한민국 | - |
| dc.citation.conferencePlace | KAIST/대전 | - |
| dc.citation.conferenceDate | 2000-02-24 ~ 2000-02-25 | - |
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Related Researcher
- Song, Min Kyu
- College of Advanced Convergence Engineering (Division of System Semiconductor)