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A Fully Si-Compatible Ni/Si3N4/Al2O3/p+ Poly-Si RRAM Device for Analog Synapse and Its System-Level Assessment toward Processing-in-Memory Applicationsopen access

Authors
Lee, YejiKim, SoominKim, SeongminShim, WonboKim, SungjunCho, Seongjae
Issue Date
Dec-2025
Publisher
American Chemical Society
Citation
ACS Omega, v.10, no.47, pp 57476 - 57486
Pages
11
Indexed
SCIE
SCOPUS
Journal Title
ACS Omega
Volume
10
Number
47
Start Page
57476
End Page
57486
URI
https://scholarworks.dongguk.edu/handle/sw.dongguk/62207
DOI
10.1021/acsomega.5c08019
ISSN
2470-1343
2470-1343
Abstract
We propose a fully Si-compatible resistive-switching random-access memory (RRAM) device consisting of a Ni/Si3N4/Al2O3/p(+) poly-Si structure for processing-in-memory (PIM) applications fabricated through a process integration with Si CMOS compatibility. By introduction of an ultrathin Al2O3 tunneling layer between the Si3N4 switching layer and p(+) poly-Si bottom electrode, the leakage current in the high-resistance state (HRS) is suppressed, resulting in stable bipolar switching characteristics with a high on/off current ratio of approximately 10(4), maintained for more than 10(7) switching operations, as evidenced through durability measurements. The retention characteristics were also maintained without degradation for a considerable time (>10(5) s). When potentiation (6.5 V, 3 mu s) and depression (-3.7 V, 3 mu s) pulses with the same voltage and time conditions were applied, the device exhibited stable conductance change characteristics with high linearity and symmetry, demonstrating its potential for use as an analog synaptic device through repeatable signal modulation. The average conductance changes were 1.72 and 1.60 mu S for potentiation and depression, respectively, confirming balanced weighting characteristics. Furthermore, based on experimentally obtained device characteristics, we implemented a VGG-8 convolutional neural network using the NeuroSim 1.4 framework and achieved high inference accuracy (90.25%), along with low latency and high energy efficiency on the CIFAR-10 data set. Thus, the proposed device holds promise for next-generation nonvolatile memory and analog neural network computing, particularly for energy-efficient processing-in-memory architectures.
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