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Design of a Full CMOS Computer Vision Sensor with an Embedded Analog Convolutional Neural Network Processor for Human Face Recognition
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Yoon, Yoochan | - |
| dc.contributor.author | Song, Hyunjin | - |
| dc.contributor.author | Kim, Soo Youn | - |
| dc.contributor.author | Song, Minkyu | - |
| dc.date.accessioned | 2025-10-28T01:30:13Z | - |
| dc.date.available | 2025-10-28T01:30:13Z | - |
| dc.date.issued | 2025 | - |
| dc.identifier.issn | 2834-9830 | - |
| dc.identifier.issn | 2834-9857 | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/61882 | - |
| dc.description.abstract | Design of a full CMOS computer vision sensor (CVS) with an embedded analog convolution neural network (CNN) processor is discussed. As well as the proposed CVS has a normal function of CMOS image sensor(CIS), it has a function of human face recognition with an analog CNN. In order to implement it with low power consumption in this paper, most of the neural network computations are accomplished in analog domain instead of digital domain. Thus a new analog circuit based on switched-capacitor technique for analog CNN processor is described. Further, a circuit technique to realize a max-pooling algorithm is also described. To verify the performance of proposed CVS, a prototype chip which has 19,200 pixels has been fabricated with 110nm CMOS technology. From experimental results, the accuracy of image classification is about 98.75%, and the power consumption is only 4.02mW at 120fps. Compared to other previous ones, the power consumption of proposed CVS is drastically reduced because a low power analog CNN processor is employed. © 2025 Elsevier B.V., All rights reserved. | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | IEEE | - |
| dc.title | Design of a Full CMOS Computer Vision Sensor with an Embedded Analog Convolutional Neural Network Processor for Human Face Recognition | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/AICAS64808.2025.11173150 | - |
| dc.identifier.scopusid | 2-s2.0-105018795072 | - |
| dc.identifier.bibliographicCitation | 2025 IEEE 7th International Conference on Artificial Intelligence Circuits and Systems (AICAS) | - |
| dc.citation.title | 2025 IEEE 7th International Conference on Artificial Intelligence Circuits and Systems (AICAS) | - |
| dc.type.docType | Conference paper | - |
| dc.description.isOpenAccess | Y | - |
| dc.description.journalRegisteredClass | foreign | - |
| dc.subject.keywordAuthor | a full CMOS computer vision sensor(CVS) | - |
| dc.subject.keywordAuthor | analog convolutional neural network(CNN) processor | - |
| dc.subject.keywordAuthor | intelligent human face recognition | - |
| dc.subject.keywordAuthor | max-pooling algorithm | - |
| dc.subject.keywordAuthor | switched-capacitor technique | - |
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