Floating gate synaptic memory of Janus WSSe Multilayer for neuromorphic computingopen access
- Authors
- Rehmat, Arslan; Asim, Muhammad; Hamza Pervez, Muhammad; Asghar Khan, Muhammad; Shin, Sang-hee; Elahi, Ehsan; Ahmad, Muneeb; Nasim, Muhammad; Rehman, Shania; Kim, Sungho; Muhammad Farooq Khan; Eom, Jonghwa
- Issue Date
- Aug-2025
- Publisher
- Elsevier Ltd
- Keywords
- Floating Gate Memory; Janus; Mnist; Synaptic Transistor; Wsse; Brain; Gold; Gold Compounds; Graphene; Heterojunctions; Learning Systems; Memory Architecture; Multilayer Neural Networks; Artificial Intelligence Technologies; Electronics Applications; Floating Gate Memory; Floating Gates; Janus; Mnist; Multifunctional Properties; Neuromorphic Computing; Synaptic Transistor; Two-dimensional Materials; Iii-v Semiconductors
- Citation
- Materials Today Advances, v.27, pp 1 - 11
- Pages
- 11
- Indexed
- SCIE
SCOPUS
- Journal Title
- Materials Today Advances
- Volume
- 27
- Start Page
- 1
- End Page
- 11
- URI
- https://scholarworks.dongguk.edu/handle/sw.dongguk/59055
- DOI
- 10.1016/j.mtadv.2025.100608
- ISSN
- 2590-0498
2590-0498
- Abstract
- Janus materials are an emerging class of two-dimensional materials with a diversity of two exclusive sides, which embark on various new multifunctional properties for electronics, optoelectronics, and memory application devices. Evolving technologies like neuromorphic computing based on floating-gate transistors, architecting an advanced artificial intelligence technology (AIT) to emulate efficient brain-like synaptic functions. In this study, we present an emerging memory design using Au/hBN/WSSe and Gr/hBN/WSSe heterostructures on the same WSSe channel, where gold and graphene serve as floating-gate materials and hexagonal boron nitride (h-BN) as an effective tunneling layer. By comparing the performance metrics based on device configurations under controlled conditions, we achieved a current ON/OFF ratio (∼105) and (∼103) for Au and few layer graphene as floating gates, respectively. The memory devices with Gr floating gate demonstrated the significant and consistent memory window of ΔV = 65 V compared to Au (ΔV = 51 V). Further, Gr/hBN/WSSe showed promising endurance (105 cycles) and retention (106 s), having gate-dependent multi-states for erase and program. Moreover, we used an artificial neural network (ANN) for digit-MNIST and Fashion-MNIST simulations, which achieved 87 % and 78 % accuracy, respectively. Simulations of WSSe-based synaptic transistors further demonstrate their capability to support ANN learning, underscoring the potential of this platform to drive next-generation AIT for memory and computing systems. © 2025 Elsevier B.V., All rights reserved.
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