Design of a Low Power CMOS Image Sensor with an in-Comparator Forcasting Technique and a Novel Counter

Abstract

This paper presents an in-comparator forecasting technique (IFT) and a novel counter for low power CMOS image sensors. The proposed circuit employs a closed-loop capacitive amplifier as a zero-crossing forecaster which is positioned between the first and second-stage comparator. This circuit provides excellent tolerance to process, voltage, temperature variations, low gain variation, and a clearly defined switching gain. Further, a novel counter to implement IFT is discussed. The proposed CIS is demonstrated using a 110nm image sensor process with an image resolution of 640 x 480 and a 2.8/1.5V power supply. The measured results show that the power consumption of digital blocks, including counters, is reduced by 40% with the proposed IFT, leading to a 20% reduction in total power consumption. © 2024 IEEE.