In-Situ Investigation of the Gate Bias Instability of Tungsten-Doped Indium Zinc Oxide Thin Film Transistor by Simultaneous Ultraviolet and Thermal Treatment
- Authors
- Kim, Min Jung; Park, Hyun-Woo; Jeong, Kwangsik; Chung, Kwun-Bum
- Issue Date
- Aug-2021
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- In-situ analysis; simultaneous ultraviolet and thermal treatment (SUT); thin-film transistor (TFT); tungsten-doped indium zinc oxide
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.8, pp 3851 - 3856
- Pages
- 6
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON ELECTRON DEVICES
- Volume
- 68
- Number
- 8
- Start Page
- 3851
- End Page
- 3856
- URI
- https://scholarworks.dongguk.edu/handle/sw.dongguk/4679
- DOI
- 10.1109/TED.2021.3090737
- ISSN
- 0018-9383
1557-9646
- Abstract
- Simultaneous ultraviolet and thermal treatments (SUTs) enhanced the stability of tungsten-doped indium zinc oxide (W-IZO) thin-film transistor (TFT) compared to the furnace-annealed W-IZO TFT. To understand the change in electrical device instability, we used the in-situ measurement under the gate bias stress to investigate the electronic structure of active layer in actual TFT device. The physical properties of the active layer in the actual TFT structure, such as the unoccupied states in the conduction band and the band edge states below the conduction band, are related to the defect states of the oxide material and show the behavior of charge trapping. Improvement of the device stability mainly comes about from dynamic changes in the electron trap site in the channel region. The in-situ analysis, the relative conduction band area, and the band edge states for SUT-treated W-IZO active layer are much less changed under the gate bias stress than the furnace annealed W-IZO active layer.
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- Appears in
Collections - College of Natural Science > Division of Physics & Semiconductor Science > 1. Journal Articles
- College of Natural Science > Department of Physics > 1. Journal Articles

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