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Design of a 1.8V 6-bit 100MSPS 5mW CMOS A/D Converter with a Low Power Folding-Interpolation Technique
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 송민규 | - |
| dc.date.accessioned | 2024-10-30T01:25:18Z | - |
| dc.date.available | 2024-10-30T01:25:18Z | - |
| dc.date.issued | 2006-09-19 | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/29539 | - |
| dc.title | Design of a 1.8V 6-bit 100MSPS 5mW CMOS A/D Converter with a Low Power Folding-Interpolation Technique | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | IEEE 32nd European Solid State Circuits Conference (ESSCIRC 2006) | - |
| dc.citation.conferencePlace | 스위스 | - |
| dc.citation.conferencePlace | Swiss Montreux | - |
| dc.citation.conferenceDate | 2006-09-19 ~ 2006-09-21 | - |
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Related Researcher
- Song, Min Kyu
- College of Advanced Convergence Engineering (Division of System Semiconductor)