Cited 5 time in
Recent Progress in Memrsitor Array Structures and Solutions for Sneak Path Current Reduction
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Yoonseok | - |
| dc.contributor.author | Jeon, Beomki | - |
| dc.contributor.author | Cho, Youngboo | - |
| dc.contributor.author | Kim, Jihyung | - |
| dc.contributor.author | Shim, Wonbo | - |
| dc.contributor.author | Kim, Sungjun | - |
| dc.date.accessioned | 2024-08-13T05:30:19Z | - |
| dc.date.available | 2024-08-13T05:30:19Z | - |
| dc.date.issued | 2025-02 | - |
| dc.identifier.issn | 2365-709X | - |
| dc.identifier.issn | 2365-709X | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/22842 | - |
| dc.description.abstract | Memristors have diverse potential for improving data storage through linear memory control and synaptic operation in AI and neuromorphic computing. Prior research on optimizing memristors in next-generation devices has generally indicated that emerging arrays and vertical structures can improve memory density, although special fabrication steps are required to realize improved operation. Until now, many obstructions, such as the sneak path current and forming processes from the initial device in array structure operation at the device level, have limited the development of array-based memristor devices for further progressing circuits and integrated design. In this paper, memristor array studies are examined that have suggested solutions for sneak path current and forming operation problems at the device level. Ultimately, representative solutions are proposed to progress memristors into array structures by introducing the latest research on one diode-one RRAM (1D1R), one selector-one RRAM (1S1R), overshoot suppressed RRAM (OSRRAM), self-rectifying cell (SRC), charge trap memory (CTM) and their applications. Additionally, essential details demonstrating the practical implementation of these devices in crossbar array memory are investigated. Finally, the advantages and perspectives of these array-based memristor solutions are summarized. © 2024 Wiley-VCH GmbH. | - |
| dc.format.extent | 17 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Wiley-VCH GmbH | - |
| dc.title | Recent Progress in Memrsitor Array Structures and Solutions for Sneak Path Current Reduction | - |
| dc.type | Article | - |
| dc.publisher.location | 독일 | - |
| dc.identifier.doi | 10.1002/admt.202400585 | - |
| dc.identifier.scopusid | 2-s2.0-85200384628 | - |
| dc.identifier.wosid | 001284206300001 | - |
| dc.identifier.bibliographicCitation | Advanced Materials Technologies, v.10, no.4, pp 1 - 17 | - |
| dc.citation.title | Advanced Materials Technologies | - |
| dc.citation.volume | 10 | - |
| dc.citation.number | 4 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.endPage | 17 | - |
| dc.type.docType | Review | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Materials Science | - |
| dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
| dc.subject.keywordPlus | RECTIFYING RESISTIVE MEMORY | - |
| dc.subject.keywordPlus | CROSSBAR ARRAYS | - |
| dc.subject.keywordPlus | SCHOTTKY DIODE | - |
| dc.subject.keywordPlus | RRAM | - |
| dc.subject.keywordPlus | SELECTOR | - |
| dc.subject.keywordPlus | PERFORMANCE | - |
| dc.subject.keywordPlus | DEVICES | - |
| dc.subject.keywordPlus | SYSTEM | - |
| dc.subject.keywordPlus | MULTILEVEL | - |
| dc.subject.keywordPlus | CONDUCTION | - |
| dc.subject.keywordAuthor | 1D1R | - |
| dc.subject.keywordAuthor | 1S1R | - |
| dc.subject.keywordAuthor | charge trap memory | - |
| dc.subject.keywordAuthor | memristor array | - |
| dc.subject.keywordAuthor | neuromorphic computing | - |
| dc.subject.keywordAuthor | overshoot suppressed RRAM | - |
| dc.subject.keywordAuthor | resistive random-access memory | - |
| dc.subject.keywordAuthor | self-rectifying cell | - |
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