Enhancing ferroelectricity in HfAlOx-based ferroelectric tunnel junctions: A comparative study of MFS and MFIS structures with ultrathin interfacial layers

Abstract

This study explores the potential advantages of metal–ferroelectric–insulator–semiconductor (MFIS) structures compared with established metal–ferroelectric–semiconductor (MFS) and metal–ferroelectric–metal structures in the context of nonvolatile memory devices. Despite the superior performance of MFS structures in terms of electric field maintenance, switching speed, and power consumption, the presence of interface-related issues between the ferroelectric material and the semiconductor may degrade device performance. We propose an MFIS structure incorporating ultrathin interfacial layers (ILs) of SiO2, HfO2, and ZrO2 to address these issues. These insulator layers enhance device endurance by reducing physical stress and trap density at the interface, thereby improving electrical performance and long-term stability. Moreover, the presence of an IL reduces charge leakage between the ferroelectric layer and semiconductor, contributing to the resolution of the sneak path current problem. An additional feature of MFIS devices is their self-rectifying behavior, simplifying circuit design and manufacturing processes by eliminating the need for an external rectification circuit, consequently reducing costs. Through a series of experiments, this study evaluates the performance of the MFIS structure, investigates the ferroelectric properties of HfAlOx-based FTJs, and examines the conduction mechanism of the MFIS structure. By comparing the o-phase of MFS, SiO2, HfO2, and ZrO2 devices via grazing incidence X-ray diffraction (GIXRD) and using the positive-up-negative-down method to extract polarization and coercive voltage, we provide a comprehensive investigation of the impact of ultrathin ILs on ferroelectric properties. This research aims to offer valuable insights into the advancement of memory device technologies, presenting the MFIS structure as a promising platform for next-generation memory technologies. Further sections will elaborate on the experimental setup, methodology, and detailed study findings. © 2024 Elsevier Ltd and Techna Group S.r.l.