Cited 105 time in
Vertical Tunnel FET: Design Optimization With Triple Metal-Gate Layers
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Ko, Eunah | - |
| dc.contributor.author | Lee, Hyunjae | - |
| dc.contributor.author | Park, Jung-Dong | - |
| dc.contributor.author | Shin, Changhwan | - |
| dc.date.accessioned | 2024-08-08T06:30:34Z | - |
| dc.date.available | 2024-08-08T06:30:34Z | - |
| dc.date.issued | 2016-12 | - |
| dc.identifier.issn | 0018-9383 | - |
| dc.identifier.issn | 1557-9646 | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/18907 | - |
| dc.description.abstract | The effect of a triple metal-gate (TMG) on the performance and on the ambipolar current in a TMG vertical tunnel field-effect transistor with triple metal-gate (TMG-TFET) is investigated using technology computer-aided design simulation. The TMG-TFET is designed to tackle the performance as well as the ambipolar current, simultaneously, by modulating the TMG parameters-the work function of the TMG and/or the length of each MG-that have critical impacts on the energy-band diagrams of the channel region. The tempered on-/off-current ratio of 10(8) and the steep average subthreshold slope of 43.5 mV/decade at a power supply voltage of 0.5 V are ascribed to the formation of an energy barrier in the channel by the optimal device parameters. It is found that two main flaws in a conventional (single-material gate) TFET, which are the degraded on-state current and the ambipolar current, can be successfully controlled by adjusting the TMG structure. | - |
| dc.format.extent | 6 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | Vertical Tunnel FET: Design Optimization With Triple Metal-Gate Layers | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/TED.2016.2619372 | - |
| dc.identifier.scopusid | 2-s2.0-84994351532 | - |
| dc.identifier.wosid | 000389342200063 | - |
| dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.63, no.12, pp 5030 - 5035 | - |
| dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
| dc.citation.volume | 63 | - |
| dc.citation.number | 12 | - |
| dc.citation.startPage | 5030 | - |
| dc.citation.endPage | 5035 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | sci | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalResearchArea | Physics | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
| dc.subject.keywordAuthor | Ambipolar current regulation | - |
| dc.subject.keywordAuthor | gate-length engineering | - |
| dc.subject.keywordAuthor | triple metal-gate (TMG) tunnel FET (TFET) | - |
| dc.subject.keywordAuthor | vertical TFET | - |
| dc.subject.keywordAuthor | work-function engineering | - |
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