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Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-Domain High-Speed Memory: A Case Study
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 한기진 | - |
| dc.date.accessioned | 2023-05-11T20:41:23Z | - |
| dc.date.available | 2023-05-11T20:41:23Z | - |
| dc.date.issued | 2018-03-19 | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/14735 | - |
| dc.title | Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-Domain High-Speed Memory: A Case Study | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018 | - |
| dc.citation.conferencePlace | 독일 | - |
| dc.citation.conferenceDate | 2018-03-19 ~ 2018-03-23 | - |
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