Wafer-scale Fabrication of Nanometer Silicon Posts for Capacitive Micromachined Ultrasonic Transducers with Substrate-Embedded Springs

  • Kim, Hae Youn
  • Kang, Dong-Hyun
  • Kim, Jinsik
  • Khuri-Yakub, Butrus T.
  • Lee, Byung Chul
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초록

A capacitive micromachined ultrasonic transducer (CMUT) with substrate-embedded springs has been demonstrated high transmit efficiency with non-flexural parallel-plate piston movement. In this paper, we introduce whole wafer-scale uniform nanometer silicon posts with a fabrication technique of combination between DRIE and RIE. In order to maintain our fabrication cost-effective, a photomask with a minimum feature size of 2.0 mu m was used for whole wafer-scale photolithography, and a size-reduced RIE process followed by DRIE was conducted for achieving the sub-micron or nanometer post area. Furthermore, In-situ nanomechanical tests of the fabricated silicon posts were conducted using a pico-indenter (PI 85L Pico-Indenter, Bruker) monitored under a scanning electron microscopy. The length and the diameter of the silicon post after size-reduction by RIE are measured as 5.6 mu m and 0.74 mu m, respectively. The uniformity across the whole 4-inch wafer is less than 5%. The loading-unloading graph by In-situ nanomechanical experiments confirmed that the silicon posts could consistently achieve above 6% elastic strain. We are currently applying this nanometer springs to the CMUTs with substrate-embedded springs.

키워드

Capacitive micromachined ultrasonic transducerNanometer silicon postsWafer-scalesize-reduction process
제목
Wafer-scale Fabrication of Nanometer Silicon Posts for Capacitive Micromachined Ultrasonic Transducers with Substrate-Embedded Springs
저자
Kim, Hae YounKang, Dong-HyunKim, JinsikKhuri-Yakub, Butrus T.Lee, Byung Chul
DOI
10.1109/IUS46767.2020.9251528
발행일
2020-09-07
유형
Proceedings Paper
저널명
PROCEEDINGS OF THE 2020 IEEE INTERNATIONAL ULTRASONICS SYMPOSIUM (IUS)
2020-September