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초록

A CMOS Image Sensor (CIS) mounted on a surveillance system does not always record a picture in a high resolution mode. In a normal state without any events or accidents, it is possible to take a picture in a low resolution mode to reduce power consumption. In this paper, a novel low power CIS which has two kinds of resolution mode is discussed to implement an intelligent surveillance system. Further, a pixel sub-sampling and a column shut-down technique are proposed. The prototype CIS chip is based on a 0.11 mu m CMOS process and satisfies a QVGA resolution (320x240) with a pitch of 5.0 mu m and a 4-Tr active-pixel sensor structure. The fabricated CIS is composed of an analog correlated double sampling (CDS), an 8-bit single-slope ADC, and a digital counter. The operating speed of the CIS is 50 frame/s with a power consumption of 9.8mW at 2.8V(Analog)/1.5 V(Digital) power supply. When the pixel-configurable technique is used, the power consumption is about 2.7mW in a 1/4 low resolution mode. Therefore, the power consumption is drastically reduced, when the proposed technique is adopted.

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