A 1.8V 6-bit 1GS/s 60mW CMOS Folding/Interpolation ADC Using Folder Reduction Circuit and Auto Switching Encoder

제목
A 1.8V 6-bit 1GS/s 60mW CMOS Folding/Interpolation ADC Using Folder Reduction Circuit and Auto Switching Encoder
저자
송민규
발행일
2008-09-02
학회명
IEEE Conference on Electronics, Circuits, and Systems (ICECS'08)
개최지
몰타
학회 개최일
2008-08-31 ~ 2008-09-03