A Wideband Bi-Directional Gain Amplifier with Asymmetric Cell using Cascade Gain Boosting in 65nm CMOS Process

A Wideband Bi-Directional Gain Amplifier with Asymmetric Cell using Cascade Gain Boosting in 65nm CMOS Process

초록

A bidirectional distributed gain amplifier (BDGA) with asymmetric cell combined with a cascade gain boosting structure is presented in this paper. Conventional DA designs generally have the gain limitation because of the additive gain mechanism, whereas the proposed structure can benefit significantly from the multiplicative gain mechanism due to the cascade of two BDGAs. Moreover, the unit gain cells are intentionally designed to be asymmetrical with the common source (CS) configuration at output stages to improve the output power of the circuit. The proposed circuit architecture is fabricated in a standard 65 nm CMOS. The measurement results show the gain of 10.5 dB, and the 3-dB bandwidth from 5.8 - 17.6 GHz. The measured output P1dB is 6.8 dBm along with 9.3 dBm of the saturated output power at 10 GHz. The circuit draws a current of 75 mA from a 1.2 V supply and occupies 1.1 x 0.6 mm2 of chip area.

키워드

Asymmetric cellBidirectional distributed CMOSGain amplifierGain boosting stage.
제목
A Wideband Bi-Directional Gain Amplifier with Asymmetric Cell using Cascade Gain Boosting in 65nm CMOS Process
제목 (타언어)
A Wideband Bi-Directional Gain Amplifier with Asymmetric Cell using Cascade Gain Boosting in 65nm CMOS Process
저자
Van Viet Nguyen남효현박정동
DOI
10.23075/jicas.2019.5.2.005
발행일
2019-04
저널명
IDEC Journal of Integrated Circuits and Systems
5
2
페이지
28 ~ 33