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A high dynamic range CMOS image sensor with a digital configurable logarithmic counter
- Bae, J.;
- Kim, D.;
- Hwang, I.;
- Song, M.
Citations
SCOPUS
2초록
Many kinds of high dynamic range (HDR) CMOS Image Sensors (CIS) have been reported, such as a multiple sampling, a multiple exposure technique, and so on. However, those techniques have some disadvantages of noise increasing, large power consumption, and huge chip area. In this paper, a new digital configurable logarithmic counter is described. Since the proposed scheme is easily implemented with a very simple technique, we can reduce power consumption and chip area drastically. Further, the logarithmic counter enhances the dynamic range (DR). The chip which has been fabricated using a 0.13um CIS process has an excellent SNDR at high speed sampling rate. © 2013 TU Dresden.
키워드
CMOS image sensor; configurable logarithmic counter; high dynamic range
- 제목
- A high dynamic range CMOS image sensor with a digital configurable logarithmic counter
- 저자
- Bae, J.; Kim, D.; Hwang, I.; Song, M.
- 발행일
- 2013
- 유형
- Conference Paper
- 저널명
- 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings