Analytical Calculation and Fabrication of FET-Embedded Capacitive Micromachined Ultrasonic Transducer

  • Park, Jin Soo; 
  • Kim, Jung Yeon; 
  • Lee, Ji-Hoon; 
  • Bae, Hee-Kyoung; 
  • Kim, Jinsik; 
  • 외 4명
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초록

In this paper, we present a full analytical model that can simulate an entire CMUT-FET structure with high accuracy and fast computation. Using the proposed analytical model, electromechanical properties, electrical characteristics (I-d-V-g), and pressure sensitivity of the CMUT-FET are simulated and analyzed. The optimal bias point of the CMUT-FET is found to be 1.3 V (Sub-threshold operation), at which the calculated pressure sensitivity is 2.584 x 10(-6) Pa-1. This optimum bias point is almost 11 times lower than 80 % pull-in voltage for conventional high-frequency CMUTs. As a consecutive work, we also report on a fabrication process of the CMUT-FET with nickel-silicided source/drain junctions and low-temperature wafer bonding. The low-temperature wafer bonding successfully demonstrates the direct integration of CMUT on FET, which is verified via cross-sectional inspection. The fabrication technique is a promising solution and can be developed further to for integration with ICs.

키워드

Field-effect transistor-embedded capacitive micromachined ultrasonic transducer (CMUT-FET); high-frequency operation; analytical model; low-temperature wafer bonding
제목
Analytical Calculation and Fabrication of FET-Embedded Capacitive Micromachined Ultrasonic Transducer
저자
Park, Jin Soo; Kim, Jung Yeon; Lee, Ji-Hoon; Bae, Hee-Kyoung; Kim, Jinsik; Hwang, Kyo Seon; Park, Jung Ho; Choi, Rino; Lee, Byung Chul
DOI
10.1109/ULTSYM.2017.8092863
발행일
2017-10
유형
Proceedings Paper
저널명
2017 IEEE INTERNATIONAL ULTRASONICS SYMPOSIUM (IUS)