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Analytical Calculation and Fabrication of FET-Embedded Capacitive Micromachined Ultrasonic Transducer
- Park, Jin Soo;
- Kim, Jung Yeon;
- Lee, Ji-Hoon;
- Bae, Hee-Kyoung;
- Kim, Jinsik;
- 외 4명
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1초록
In this paper, we present a full analytical model that can simulate an entire CMUT-FET structure with high accuracy and fast computation. Using the proposed analytical model, electromechanical properties, electrical characteristics (I-d-V-g), and pressure sensitivity of the CMUT-FET are simulated and analyzed. The optimal bias point of the CMUT-FET is found to be 1.3 V (Sub-threshold operation), at which the calculated pressure sensitivity is 2.584 x 10(-6) Pa-1. This optimum bias point is almost 11 times lower than 80 % pull-in voltage for conventional high-frequency CMUTs. As a consecutive work, we also report on a fabrication process of the CMUT-FET with nickel-silicided source/drain junctions and low-temperature wafer bonding. The low-temperature wafer bonding successfully demonstrates the direct integration of CMUT on FET, which is verified via cross-sectional inspection. The fabrication technique is a promising solution and can be developed further to for integration with ICs.
키워드
- 제목
- Analytical Calculation and Fabrication of FET-Embedded Capacitive Micromachined Ultrasonic Transducer
- 저자
- Park, Jin Soo; Kim, Jung Yeon; Lee, Ji-Hoon; Bae, Hee-Kyoung; Kim, Jinsik; Hwang, Kyo Seon; Park, Jung Ho; Choi, Rino; Lee, Byung Chul
- 발행일
- 2017-10
- 유형
- Proceedings Paper
- 저널명
- 2017 IEEE INTERNATIONAL ULTRASONICS SYMPOSIUM (IUS)
- 언어
- ENG
- 출판사
- IEEE
- 발행국가
- 미국
- ISSN
- P 1948-5719