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Design of a 1.8V 6-bit 100MSPS 5mW CMOS A/D Converter with a Low Power Folding-Interpolation Technique
- 제목
- Design of a 1.8V 6-bit 100MSPS 5mW CMOS A/D Converter with a Low Power Folding-Interpolation Technique
- 저자
- 송민규
- 발행일
- 2006-09-19
- 학회명
- IEEE 32nd European Solid State Circuits Conference (ESSCIRC 2006)
- 개최지
- Swiss Montreux
- 학회 개최일
- 2006-09-19 ~ 2006-09-21