An 884MHz, -41.8dBm Input Power Sensitivity, 570-Stage CMOS RF-DC Rectifier With Ground Shielded Input Coupling Capacitors

Citations

WEB OF SCIENCE

0
Citations

SCOPUS

1

초록

This paper presents an 884MHz CMOS RF-DC rectifier for ambient RF energy harvesting. Generally, the input power sensitivity increases as the RF-DC rectifier contains more number of rectifier cells. However, integrating a large number of rectifier cells normally reduces the passive amplification gain of the matching network and thus may not bring the desired results. In this paper, the proposed RF-DC rectifier adopts metal ground shield plane beneath the input coupling capacitors thereby incorporating as many as 570 rectifier cells without lowering the passive amplification gain. By doing so, the 884MHz, 570-stage RF-DC rectifier implemented in a 28nm 1P11M CMOS process achieves the measured input power sensitivity of -41.8dBm at 1V output DC voltage. The measured recharging time from 0.88V to 1.0V is 11.1 seconds when the storage capacitor is 1nF. Also, the over-the-air functionality with ambient LTE downlink signals has been demonstrated in a real environment. © 2024 IEEE.

키워드

ground shielded capacitorinput power sensitivityRF energy harvesterRF-DC rectifiersubstrate resistance
제목
An 884MHz, -41.8dBm Input Power Sensitivity, 570-Stage CMOS RF-DC Rectifier With Ground Shielded Input Coupling Capacitors
저자
Park, YoomiByun, Sangjin
DOI
10.1109/ISCAS58744.2024.10558172
발행일
2024-07
유형
Proceedings Paper
저널명
Proceedings - IEEE International Symposium on Circuits and Systems