The Design of a Computer Vision Sensor Based on a Low-Power Edge Detection Circuit

초록

We propose a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) that performs edge mask computation and detection during the analog-to-digital (A/D) conversion process to output 1-bit edge images. By utilizing the characteristics of the edge that can obtain a 1-bit image, the edge mask and thresholding operations are performed simultaneously during the A/D conversion process, thereby reducing memory capacity along with a high number of frames per second (FPS). Additionally, by implementing a 1-bit analog-to-digital converter (ADC) instead of a high-resolution ADC and counter through the 1-bit edge data obtained from the edge mask operation, both static and dynamic power consumption are reduced. The proposed CIS, fabricated with a one-poly six-metal CIS process with a 4T-active pixel sensor, has a core area of 2.546 mm x 1.923 mm in a chip area of 2.558 mm x 4.3 mm. The total power consumption is 1.52 mW at 23 FPS, with power supplies of 2.8 V and 1.5 V for the analog domain and 1.5 V for the digital domain.

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