A Gate-Width Scalable Method of Parasitic Parameter Determination for Distributed HEMT Small-Signal Equivalent Circuit

  • Tung The-Lam Nguyen
  • Kim, Sam-Dong
Citations

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초록

We propose a gate-width scalable method for extracting the reliable parasitic elements of the 0.1-mu m GaAs metamorphic high electron-mobility transistors. This method utilizes the de-embedding scheme for coplanar waveguide (CPW) feeding structure by considering the distributed extrinsic parasitic elements in our small-signal model. The parasitic capacitances are determined based on estimation of the sub-model (the model after de-embedding the contribution of the CPW feeding structure). We perform the parameter extraction at four different gate widths of the devices to examine the scaling effect. The model shows the best S-parameter effective fitting error of 9.85% among four different extraction methods evaluated in this study over the entire gate-width variation and in a frequency range of 0.5-110 GHz.

키워드

Device modelinghigh electron-mobility transistors (HEMTs)microwave device modelingmicrowave monolithic integrated circuit (MMIC)parameter extractionMODELING APPROACH
제목
A Gate-Width Scalable Method of Parasitic Parameter Determination for Distributed HEMT Small-Signal Equivalent Circuit
저자
Tung The-Lam NguyenKim, Sam-Dong
DOI
10.1109/TMTT.2013.2279360
발행일
2013-10
유형
Article
저널명
IEEE Transactions on Microwave Theory and Techniques
61
10
페이지
3632 ~ 3638