Negative Capacitance in Organic/Ferroelectric Capacitor to Implement Steep Switching MOS Devices

  • Jo, Jaesung
  • Choi, Woo Young
  • Park, Jung-Dong
  • Shim, Jae Won
  • Yu, Hyun-Yong
  • 외 1명
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초록

Because of the "Boltzmann tyranny" (i.e., the non-scalability of thermal voltage), a certain minimum gate voltage in metal oxide semiconductor (MOS) devices is required for a 10-fold increase in drain-to-source current. The subthreshold slope (SS) in MOS devices is, at best, 60 mV/decade at 300 K. Negative capacitance in organic/ferroelectric materials is proposed in order to address this physical limitation in MOS technology. Here, we experimentally demonstrate the steep switching behavior of a MOS device-that is, SS similar to 18 mV/decade (much less than 60 mV/decade) at 300 K-by taking advantage of negative capacitance in a MOS gate stack. This negative capacitance, originating from the dynamics of the stored energy in a phase transition of a ferroelectric material, can achieve the step-up conversion of internal voltage (i.e., internal voltage amplification in a MOS device). With the aid of a series-connected negative capacitor as an assistive device, the surface potential in the MOS device becomes higher than the applied gate voltage, so that a SS of 18 mV/decade at 300 K is reliably observed.

키워드

negative capacitancesteep switchingmetal-oxide-semiconductor field-effect transistor (MOSFET)ferroelectrics
제목
Negative Capacitance in Organic/Ferroelectric Capacitor to Implement Steep Switching MOS Devices
저자
Jo, JaesungChoi, Woo YoungPark, Jung-DongShim, Jae WonYu, Hyun-YongShin, Changhwan
DOI
10.1021/acs.nanolett.5b01130
발행일
2015-07
유형
Article
저널명
Nano Letters
15
7
페이지
4553 ~ 4556