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비 적층적 및 대칭적 전류모드 논리회로
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 변상진 | - |
| dc.date.accessioned | 2025-09-09T06:35:49Z | - |
| dc.date.available | 2025-09-09T06:35:49Z | - |
| dc.identifier.uri | https://scholarworks.dongguk.edu/handle/sw.dongguk/59461 | - |
| dc.title | 비 적층적 및 대칭적 전류모드 논리회로 | - |
| dc.title.alternative | Non-stacked and Symmetric Current Mode Logic Circuit | - |
| dc.type | Patent | - |
| dc.publisher.location | 대한민국 | - |
| dc.contributor.assignee | 동국대학교산학협력단 | - |
| dc.date.application | 2013-02-28 | - |
| dc.date.registration | 2014-08-01 | - |
| dc.type.iprs | 특허 | - |
| dc.identifier.patentRegistrationNumber | 10-1428027 | - |
| dc.identifier.patentApplicationNumber | 10-2013-0022399 | - |
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Related Researcher
- Byun, Sangjin
- College of Engineering (Department of Electronics and Electrical Engineering)