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Etchant-Free Wafer-Scale 2D Transfer and van der Waals 3D Integration via Peel-Off Force Engineering

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dc.contributor.authorPyo, Jinhyeok-
dc.contributor.authorLim, Jungmoon-
dc.contributor.authorByeon, Junsung-
dc.contributor.authorPark, Sohyeon-
dc.contributor.authorKang, Sungsan-
dc.contributor.authorPark, Seonyou-
dc.contributor.authorLee, Sung-Tae-
dc.contributor.authorKim, Eunmin-
dc.contributor.authorKim, Min Kyeong-
dc.contributor.authorSohn, Jung Inn-
dc.contributor.authorHong, John-
dc.contributor.authorCho, Jungwan-
dc.contributor.authorPark, Kyung-Ho-
dc.contributor.authorCha, Seungnam-
dc.contributor.authorPak, Sangyeon-
dc.date.accessioned2025-07-22T01:30:16Z-
dc.date.available2025-07-22T01:30:16Z-
dc.date.issued2025-07-
dc.identifier.issn1936-0851-
dc.identifier.issn1936-086X-
dc.identifier.urihttps://scholarworks.dongguk.edu/handle/sw.dongguk/58777-
dc.description.abstractClean van der Waals (vdW) contacts are critical for realizing high-performance, reliable devices and integrated circuits based on two-dimensional (2D) transition metal dichalcogenides (TMDs). However, conventional transfer methods that rely on etchants often degrade TMDs, hampering the formation of pristine vdW interfaces. Here, we suggest an etchant-free transfer technique that prevents both direct and indirect damage by precisely controlling the peel-off force (POF) through surface-tension modulation (STM). Guided by a modified Kendall's model, we determine the optimal surface tension for common, nontoxic mixtures of deionized water and ethanol, thereby maximizing the POF. Using this POF-assisted method, we fabricate high-performance 2D vdW field-effect transistors (FETs), integrating device components without etchant-induced damage. These FETs exhibit a field-effect mobility of 162.2 cm2 <middle dot>V-1 <middle dot>s-1, an on/off ratio exceeding 108, a subthreshold swing of 72 mV<middle dot>dec-1, and an interface trap density of similar to 1012 cm-2<middle dot>eV-1, demonstrating high-quality vdW contacts. Finally, we suggest the all-vdW logic circuit design, demonstrated through a complementary metal-oxide-semiconductor (CMOS) logic test structure. This work demonstrates a process-compatible approach for the lab-to-fab transition of 2D TMD electronics, achieving reliable device yields and the performance levels required for next-generation vdW-integrated systems.-
dc.format.extent10-
dc.language영어-
dc.language.isoENG-
dc.publisherAmerican Chemical Society-
dc.titleEtchant-Free Wafer-Scale 2D Transfer and van der Waals 3D Integration via Peel-Off Force Engineering-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1021/acsnano.5c04785-
dc.identifier.scopusid2-s2.0-105010269981-
dc.identifier.wosid001526318500001-
dc.identifier.bibliographicCitationACS Nano, v.19, no.28, pp 25860 - 25869-
dc.citation.titleACS Nano-
dc.citation.volume19-
dc.citation.number28-
dc.citation.startPage25860-
dc.citation.endPage25869-
dc.type.docTypeArticle-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaChemistry-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalResearchAreaMaterials Science-
dc.relation.journalWebOfScienceCategoryChemistry, Multidisciplinary-
dc.relation.journalWebOfScienceCategoryChemistry, Physical-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.relation.journalWebOfScienceCategoryMaterials Science, Multidisciplinary-
dc.subject.keywordPlusSURFACE-TENSION-
dc.subject.keywordPlusWATER-
dc.subject.keywordPlusTRANSITION-
dc.subject.keywordPlusCONTACT-
dc.subject.keywordPlusDEVICES-
dc.subject.keywordPlusFILMS-
dc.subject.keywordPlusLAYER-
dc.subject.keywordAuthorTMDs-
dc.subject.keywordAuthor2D transfer-
dc.subject.keywordAuthorsurface tension-
dc.subject.keywordAuthorpeel-off force-
dc.subject.keywordAuthordevice integration-
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