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An implementation of intra prediction with transform for H.264/AVC

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dc.contributor.authorLee, Eunchong-
dc.contributor.authorYoo, Jeongwoo-
dc.contributor.authorYe, Sangwoo-
dc.contributor.authorHong, Youpyo-
dc.date.accessioned2024-09-25T03:31:41Z-
dc.date.available2024-09-25T03:31:41Z-
dc.date.issued2013-
dc.identifier.issn1349-2543-
dc.identifier.urihttps://scholarworks.dongguk.edu/handle/sw.dongguk/23648-
dc.description.abstractTremendous efforts have been made to reduce the cycles per macroblock for intra prediction and transform function blocks for H. 264/AVC encoders. We propose a high performance intra prediction and transform logic that can be used for all prediction cases, even when considering the interface with inter prediction results; the overall performance of the encoder is therefore ensured for real-time operation for UHD images.-
dc.language영어-
dc.language.isoENG-
dc.publisherIEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG-
dc.titleAn implementation of intra prediction with transform for H.264/AVC-
dc.typeArticle-
dc.publisher.location일본-
dc.identifier.doi10.1587/elex.10.20130510-
dc.identifier.scopusid2-s2.0-84881483064-
dc.identifier.wosid000324836600012-
dc.identifier.bibliographicCitationIEICE ELECTRONICS EXPRESS, v.10, no.15-
dc.citation.titleIEICE ELECTRONICS EXPRESS-
dc.citation.volume10-
dc.citation.number15-
dc.type.docTypeArticle-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusVLSI ARCHITECTURE-
dc.subject.keywordAuthorH.264/AVC-
dc.subject.keywordAuthorintra prediction-
dc.subject.keywordAuthorinter prediction-
dc.subject.keywordAuthortransform-
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