A 82.5% Power Efficiency at 1.2 mW Buck Converter with Sleep Control

Abstract

This paper presents a DC-DC buck converter which uses a sleep control to improve the power efficiency in a few mW light load condition. The sleep control turns off analog controller building blocks to reduce the static power losses during the offduty period of pulse width modulation. For verification, a buck converter has been implemented in a 0.18 mu m CMOS process. The power efficiency has been improved from 76.7% to 82.5% with a 1.2 mW load. The maximum power efficiency is 95% with a 9 mW load.