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1-5.6 Gb/s CMOS clock and data recovery IC with a static phase offset compensated linear phase detector

Byun, Sangjin; Son, Chung Hwan; Hwang, Jongil; Min, Byung-Hun; Park, Mun-Yang; Yu, Hyun-Kyu

ArticleIssue Date2013CitationIET CIRCUITS DEVICES & SYSTEMS, v.7, no.3, pp 159 - 168PublisherINST ENGINEERING TECHNOLOGY-IET
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